AMD Announces Zen 5-based EPYC “Turin” Processors: Up to 192 Cores, Coming in H2’2024 – Niraranra


With AMD’s Zen 5 CPU structure solely a month away from its first product releases, the brand new CPU structure was positioned entrance and middle for AMD’s prime Computex 2024 keynote. Outlining how Zen 5 will result in improved merchandise throughout AMD’s whole portfolio, the corporate laid out their product plans for the total triad: cellular, desktop, and servers. And whereas server chips would be the final elements to be launched, AMD additionally saved one of the best for final by showcasing a 192 core EPYC “Turin” chip.

Turin is the catch-all codename for AMD’s Zen 5-based EPYC server processors – what’s going to presumably be the EPYC 9005 sequence. The corporate has beforehand disclosed the title in earnings calls and different investor capabilities, outlining that the chip was already sampling to clients and that the silicon was “looking great.”

The Computex reveal, in flip, is the primary time that the silicon has been proven off to the general public. And with it, we’ve acquired the primary official affirmation of the chip’s specs. With SKUs as much as 192 CPU cores, it’s going to be a monster of an x86 CPU.

AMD EPYC CPU Generations
AnandTech EPYC fifth Gen
(Turin, Z5c)
EPYC 9704
(Bergamo)
EPYC 9004
(Genoa)
EPYC 7003
(Milan)
CPU Structure Zen 5c Zen 4c Zen 4 Zen 3
Max CPU Cores 192 128 96 64
Reminiscence Channels 12 x DDR5 12 x DDR5 12 x DDR5 8 x DDR4
PCIe Lanes 128 x 5.0 128 x 5.0 128 x 5.0 128 x 4.0
L3 Cache ? 256MB 384MB 256MB
Max TDP 360W? 360W 400W 280W
Socket SP5 SP5 SP5 SP3
Manufacturing
Course of
CCD: TSMC N3
IOD:TSMC N6
CCD: TSMC N5
IOD: TSMC N6
CCD: TSMC N5
IOD: TSMC N6
CCD: TSMC N7
IOD: GloFo 14nm
Launch Date H2’2024 06/2023 11/2022 03/2021

Although solely a short tease, AMD’s Turin showcase did affirm a number of, long-suspected particulars in regards to the platform. AMD will as soon as once more be utilizing their socket SP5 platform for Turin processors, which suggests the chips are drop-in appropriate with EPYC 9004 Genoa (and Bergamo). The reuse of SP5 signifies that clients and server distributors can instantly swap out chips with out having to construct/deploy entire new methods. It additionally signifies that Turin can have the identical base reminiscence and I/O choices because the EPYC 9004 sequence: 12 channels of DDR5 reminiscence, and 128 PCIe 5.0 lanes.

When it comes to energy consumption, present SP5 processors high out at 400 Watts, and we’d anticipate the identical for these new, socket-compatible chips.

As for the Turin chip itself, whereas AMD shouldn’t be going into additional element on its configuration, all indicators level to this being a Zen 5c configuration – that’s, constructed utilizing CCDs designed round AMD’s compact Zen 5 core configuration. This might make the Turin chip on show the successor to Bergamo (EPYC 9704), which was AMD’s first compact core server processor, utilizing Zen 4c cores. AMD’s compact CPU cores usually commerce off per-core efficiency in favor of permitting extra CPU cores total, with decrease clockspeed limits (by design) and fewer cache reminiscence all through the chip.

In accordance with AMD, the CCDs on this chip have been fabbed on a 3nm course of (undoubtedly TSMC’s), with AMD apparently trying to benefit from the densest course of accessible with a view to maximize the variety of CPU cores the can place on a single chip. Even then, the CCDs featured listed below are fairly sizable, and whereas we’re ready for official die measurement numbers, it will come as no shock if Zen 5’s increased transistor depend greater than offset the area financial savings of shifting to 3nm. Nonetheless, AMD has been capable of squeeze 12 CCDs on to the chip – 4 greater than Bergamo – which is what’s permitting them to supply 192 CPU cores as an alternative of 128 as within the final technology.

In the meantime, the IOD is confirmed to be produced on 6nm. Judging from that reality, the images, and what AMD’s doing with their Zen 5 desktop merchandise, there’s a superb probability that AMD is utilizing both the identical or a really comparable IOD as on Genoa/Bergamo. Which fits hand-in-hand with the socket/platform on the different finish of the chip staying the identical.

AMD’s transient teaser didn’t talk about in any respect some other Turin configurations. So there’s nothing else official to share about Turin chips constructed utilizing full-sized Zen 5 CPU cores. With that mentioned, we all know that the full-fat cores going into the Ryzen 9000 desktop sequence pack 8 cores to a CCD and are being fabbed on a 4nm course of – not 3nm – in order that strongly implies that EPYC Zen 5 CCDs would be the identical. Which, if that pans out, signifies that Turin chips utilizing excessive efficiency cores will max out at 96 cores, the identical as Genoa.

{Hardware} configurations apart, AMD additionally showcased a few benchmarks, pitting the brand new EPYC chips towards Intel’s Xeons. As you’d anticipate in a keynote teaser, AMD was successful handily. Although it’s attention-grabbing to notice that the chips benchmarked have been all 128 core Turins – which suggests these benchmarks could have been on chips utilizing the full-fat cores.

AMD can be transport EPYC Turin within the second half of this yr. Extra particulars on the chips and configurations will observe as soon as AMD will get nearer to the EPYC launch.

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